Priyanka Raina is an Assistant Professor of Electrical Engineering at Stanford University. She received her BTech in Electrical Engineering from IIT Delhi in 2011 and her SM and PhD in Electrical Engineering and Computer Science from MIT in 2013 and 2018. Priyanka’s research is on creating high-performance and energy-efficient architectures for domain-specific hardware accelerators in existing and emerging technologies and agile hardware-software co-design. Her research has won best paper awards at VLSI, ESSCIRC and MICRO conferences and in the JSSC journal. Priyanka teaches several VLSI design classes at Stanford. She has also won the Sloan Research Fellowship, NSF CAREER Award, Intel Rising Star Faculty Award, Hellman Faculty Scholar Award and is a Terman Faculty Fellow.
Research Interests: Domain-Specific Architectures, Hardware/Software Co-design, Design Productivity, Machine Learning, Near-Memory Computing
For a complete list of ongoing and past projects please see her publications and research group website.
News and Talk Videos
- Priyanka Raina received the Sloan Research Fellowship, February 20, 2024.
- Jeffrey Yu graduated with an MS in Electrical Engineering. He is joining Stanford for his PhD, June 18, 2023.
- Yuchen Mei graduated with an MS in Electrical Engineering. He is joining Stanford for his PhD, June 18, 2023.
- Akash Levy graduated with a PhD in Electrical Engineering, June 18, 2023.
- Jackson Melchert won the Apple Stanford EE PhD Fellowship in Integrated Systems, April 18, 2023.
- Kartik Prabhu won the Apple Stanford EE PhD Fellowship in Integrated Systems, April 18, 2023.
- Priyanka Raina received the NSF CAREER Award for “A Framework for Co-design and Optimization of Programmable Hardware Accelerators and Compilers”, March 3, 2023.
- Kathleen Feng received the ISSCC 2022 Student Research Preview Poster Award for “Amber: A 441.2 GOPS/W 16nm Coarse Grained Reconfigurable Array-Based SoC Accelerator for Image Processing and Computer Vision” at ISSCC 2023.
- The PCAST Report on Recommendations for Semiconductors R&D, that I worked on as a part of the Working Group on Semiconductors, has been released, September 20, 2022.
- Our Nature paper “A compute-in-memory chip based on resistive random-access memory” featured on Stanford News, August 18, 2022.
- Our paper “Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra” won the Best Demo Paper Award at the 2022 IEEE Symposium on VLSI Technology & Circuits, June 14, 2022.
- Our paper “CHIMERA: A 0.92 TOPS, 2.2 TOPS/W Edge AI Accelerator with 2 MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference” won the Best Student Paper Award at the 2021 IEEE Symposia on VLSI Technology & Circuits, June 14, 2022.
- John Kustin graduated with a BS in Electrical Engineering and received the Student Design Project Award for his EE272B project “An Open-Source Bandgap Voltage Reference Circuit in SkyWater 130 nm Technology”. He is joining University of Michigan for his PhD, June 12, 2022.
- Michael Oduoza graduated with a BS and SM in Electrical Engineering. He is joining UC Berkeley for his PhD, June 12, 2022.
- Weier Wan graduated with a PhD in Electrical Engineering, June 12, 2022.
- Haitong Li graduated with a PhD in Electrical Engineering. He is starting as an Assistant Professor at Purdue University, June 12, 2022.
- Accelerating Semiconductor Innovation in the U.S. at the PCAST public meeting on the challenges and opportunities for U.S. leadership in semiconductors, May 12, 2022. Video
- AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers at the Berkeley/Stanford/UCSC Cloud Workshop, May 11, 2022. Video
- How computer chips get speedier through specialization in Stanford Engineering’s The Future of Everything podcast with Russ Altman, September 21, 2021. Video
Work Experience
Stanford University, Stanford, CA
Assistant Professor, Electrical Engineering
Sep 2018 - Present
Amazon, Sunnyvale, CA
Amazon Visiting Academic
May 2023 – Present
NVIDIA Corporation, Santa Clara, CA
Visiting Research Scientist, Architecture Research Group, NVIDIA Research
Jan 2018 - Aug 2018
Intel Corporation, Hillsboro, OR
Graduate Research Intern, Intel Labs
Jun 2013 - Aug 2013
Education
PhD in Electrical Engineering and Computer Science (EECS), Massachusetts Institute of Technology (MIT)
Jun 2013 - Feb 2018
Thesis: Energy-Efficient Circuits and Systems for Computational Imaging and Vision on Mobile Devices
Advisor: Anantha Chandrakasan
S.M. in Electrical Engineering and Computer Science, Massachusetts Institute of Technology (MIT)
Sep 2011 - Jun 2013
Thesis: Architectures for Computational Photography
Advisor: Anantha Chandrakasan
B.Tech. in Electrical Engineering, Indian Institute of Technology (IIT) Delhi
Jul 2007 - May 2011, Department Rank: 1, Institute Rank: 2
Thesis: Transactional Memory Architecture for Multi-core Processors
Advisor: Anshul Kumar
Affiliations
Stanford AHA (Agile Hardware) Center
SystemX Alliance
SRC JUMP2.0 COCOSYS: Center for the Co-Design of Cognitive Systems
SRC JUMP2.0 PRISM: Center for Processing with Intelligent Storage and Memory
Contact
praina at stanford dot edu
Paul G. Allen Building, Room 114
330 Jane Stanford Way, Stanford, CA 94305
Stanford website: https://profiles.stanford.edu/priyanka-raina
Research group website: https://stanfordaccelerate.github.io/
Google scholar